发明名称 REVERSE CURRENT BLOCKING COMPARATOR
摘要 An apparatus comprises at least one transistor configured as analog switch, a well biasing circuit configured to provide a dynamic electrical bias to a bulk region of the at least one transistor, and a comparator circuit in electrical communication with the well biasing circuit and the transistor. The comparator circuit is configured to detect a first operating condition of the transistor and a second operating condition of the transistor. The well biasing circuit is configured to apply a first electrical bias to the bulk region of a transistor when the first operating condition is detected and apply a second electrical bias to the bulk region of the transistor when the second operating condition is detected, and wherein the comparator is configured to apply hysteresis to detection of the first and second operating conditions.
申请公布号 US2014323184(A1) 申请公布日期 2014.10.30
申请号 US201414228614 申请日期 2014.03.28
申请人 FAIRCHILD SEMICONDUCTOR CORPORATION 发明人 Daigle Tyler;Stultz Julie Lynn
分类号 H03K17/06;H02J7/00 主分类号 H03K17/06
代理机构 代理人
主权项 1. An apparatus comprising: at least one transistor configured as an analog switch; a well biasing circuit configured to provide a dynamic electrical bias to a bulk region of the at least one transistor; and a comparator circuit in electrical communication with the well biasing circuit and the transistor, wherein the comparator circuit is configured to detect a first operating condition of the transistor and a second operating condition of the transistor, wherein the well biasing circuit is configured to apply a first electrical bias to the bulk region of a transistor when the first operating condition is detected and apply a second electrical bias to the bulk region of the transistor when the second operating condition is detected, and wherein the comparator is configured to apply hysteresis to detection of the first and second operating conditions.
地址 San Jose CA US