| 摘要 |
<p>A variable-resistance memory device that includes a memory-cell array employing a plurality of memory cells each including a storage element and an access transistor. The storage element has a resistance varying in accordance with the direction of a voltage applied to the storage element and the access transistor is connected in series to the storage element between a bit line and a source line. A voltage supplying circuit sets a read voltage used for reading out the resistance of the storage element on a selected bit line connected to the memory cell serving as a read object in an operation to supply the read voltage to the selected bit line.</p> |
