INHERENT FAIL SAFE ENABLING CONTROL AND COMMAND UNIT WITH TWO OUT OF TWO ARCHITECTURE

摘要

A voter unit (1) has the task of generating a vital enable signal when certain operative conditions are met. These conditions consist in the congruence of the signals on two parallel data channels each of which is fed by a logic unit (FGPA or CPU) of a 2002 system (2) by comparing predefined sequences of bits (pattern). The Voter unit habilitates the actuating circuits of the system to which it is applied by an output signal which is generated only if the data on the two channels are at any time complementary and synchronous. The voter unit (1) has inputs for the two output channels of a 2002 logic (2). The congruence of the signals of these two channels allows enabling by the 2002 logic (2) of the power signals of the Voter unit (1) and of the output of voter unit (1) for generating the vital driving or command signal. The voter architecture allows to use the output of a voter for driving a further voter unit.