| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To reduce a leak current, and to reduce channel resistance. <P>SOLUTION: An n-type buffer layer 2, an n<SP>-</SP>-type drift layer 3, and a p-type base layer 5 are laminated on an n<SP>+</SP>-type 4H-SiC substrate 1 in this order. A p<SP>+</SP>-type body contact region 6 and an n<SP>+</SP>-type source region 7 are formed separately on a surface layer of the p-type base layer 5. A second trench 8 is formed to be in contact with the n<SP>+</SP>-type source region 7, and reach the n<SP>-</SP>-type drift layer 3. A gate electrode 10 is arranged on the second trench 8 through a gate oxide film 9. A source electrode 12 is arranged on the p<SP>+</SP>-type body contact region 6 and the n<SP>+</SP>-type source region 7 separatedly from the gate electrode 10 by an interlayer insulation film 11. A drain electrode 13 is arranged on an entire second main surface of an epitaxial wafer. <P>COPYRIGHT: (C)2011,JPO&INPIT</p> |
