发明名称 |
Multi-tiered semiconductor apparatuses including residual silicide in semiconductor tier |
摘要 |
Methods of forming multi-tiered semiconductor devices are described, along with apparatuses that include them. In one such method, a silicide is formed in a tier of silicon, the silicide is removed, and a device is formed at least partially in a void that was occupied by the silicide. One such apparatus includes a tier of silicon with a void between tiers of dielectric material. Residual silicide is on the tier of silicon and/or on the tiers of dielectric material and a device is formed at least partially in the void. Additional embodiments are also described. |
申请公布号 |
US8872252(B2) |
申请公布日期 |
2014.10.28 |
申请号 |
US201113197557 |
申请日期 |
2011.08.03 |
申请人 |
Micron Technology, Inc. |
发明人 |
Jindal Anurag;Damarla Gowri;Lindsay Roger W.;Blomiley Eric |
分类号 |
H01L29/788;H01L27/115;H01L21/3213;H01L21/02 |
主分类号 |
H01L29/788 |
代理机构 |
Schwegman Lundberg & Woessner, P.A. |
代理人 |
Schwegman Lundberg & Woessner, P.A. |
主权项 |
1. An apparatus comprising:
a tier of semiconductor material between tiers of dielectric material; a void in the tier of semiconductor material between the tiers of the dielectric; residual silicide lining the void on the tier of semiconductor material and/or on the tiers of dielectric material, wherein the residual silicide lining is a di-silicide lining resulting from two rapid thermal processing (RTP) anneal processes; and a device at least partially formed in the void and over the residual silicide; wherein the tier of semiconductor material comprises a tier of polysilicon; wherein the dielectric material comprises silicon dioxide; and wherein the device comprises a polysilicon floating gate. |
地址 |
Boise ID US |