| 主权项 |
1. An apparatus comprising:
a first core with a first architecture and that is designed for a first voltage frequency domain; and a second core with the first architecture and that is designed for a second voltage-frequency domain, wherein the first voltage-frequency domain and second voltage-frequency domain are calculated by selecting a set of voltage-frequency domains for a standard cell library, reducing one or more of a frequency and a voltage of each voltage-frequency domain in the set of voltage-frequency domains to synthesize synthetic voltage-frequency domains in the set of voltage-frequency domains, and calculating the first voltage-frequency domain and second voltage-frequency domain through simulated annealing minimization of an equation ΣE(Fi(v)) wherein E is an energy consumption, F is a frequency in the set of voltage-frequency domains, v is a voltage in the set of voltage-frequency domains, and v and F(v) are initially set to a highest voltage-frequency domain of the standard cell library, and the simulated annealing minimization is a function of a multicore performance yield as a function of voltage Y(v) for the first core and the second core, wherein Y(v) is calculated as Y(v)=Pr1/nΣi=1nIPCi(u)/IPCbase where Pr is performance of the first core and the second core, IPCbase is instructions per cycle (IPC) of an application running in a core of the first and second cores with a highest voltage-frequency domain, IPCi(v) is an IPC of the application running on an ith core. |
