Gated co-planar poly-silicon thin film diode

摘要

A diode has a first contact of a material having a first conductivity type, a second contact of a material having a second conductivity type arranged co-planarly with the first contact, a channel arranged co-planarly between the first and second contacts, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate. A diode has a layer of material arranged on a substrate, a first region of material doped to have a first conductivity type, a second region of material doped to have a second conductivity type, a channel between the first and second regions formed of an undoped region, a gate arranged adjacent the channel, and a voltage source electrically connected to the gate. A method includes forming a layer of material on a substrate, forming a first region of a first conductivity in the material, forming a second region of a second conductivity in the material, arranged so as to provide a channel region between the first and second regions, the channel region remaining undoped, depositing a layer of gate dielectric on the layer of material, arranging a gate adjacent the channel region on the gate dielectric, and electrically connecting a voltage source to the gate.

主权项

1. A method, comprising:
forming a layer of material having a thickness less than 100 nanometers on a substrate; forming a first region of a first conductivity in the material; forming a second region of a second conductivity in the material, arranged so as to provide a channel region between the first and second regions, the channel region remaining undoped, forming an anode having a capacitance and a cathode with capacitance, wherein only one of the anode capacitance or the cathode capacitance is non-zero at a given time; depositing a layer of gate dielectric on the layer of material; arranging a metal gate adjacent the channel region on the gate dielectric such that the gate avoids overlapping the first and second regions; and electrically connecting a voltage source to the gate, the voltage source being operable either positively or negatively, wherein a polarity of the voltage determines a gate bias polarity, the gate bias polarity determining which of the anode capacitance or the cathode capacitance is non-zero at the given time.