发明名称 |
Stacked chip module with integrated circuit chips having integratable built-in self-maintenance blocks |
摘要 |
Disclosed is a stacked chip module and associated method with integrated circuit (IC) chips having integratable built-in self-maintenance blocks. The module comprises a stack of chips and each chip comprises a self-maintenance block with first and second controllers. The first controller controls wafer-level and module-level servicing (e.g., self-testing or self-repairing) of an on-chip functional block. The second controller provides an interface between an off-chip tester and the first controller during wafer-level servicing. Each chip further comprises a plurality of interconnect structures (e.g., multiplexers and through-substrate-vias) that integrate the self-maintenance blocks of adjacent chips in the stack so that, during module-level servicing, a single second controller on a single one of the chips in the stack (e.g., the bottom chip) provides the only interface between the off-chip tester and all of the first controllers. |
申请公布号 |
US8872322(B2) |
申请公布日期 |
2014.10.28 |
申请号 |
US201213656844 |
申请日期 |
2012.10.22 |
申请人 |
International Business Machines Corporation |
发明人 |
Gorman Kevin W.;Leu Derek H.;Mondal Krishnendu;Sethuraman Saravanan |
分类号 |
G01R31/28 |
主分类号 |
G01R31/28 |
代理机构 |
Gibb & Riley, LLC |
代理人 |
Gibb & Riley, LLC ;Cain, Esq. David A. |
主权项 |
1. A stacked chip module comprising a stack of integrated circuit chips, each of said integrated circuit chips in said stack comprising:
a functional block on a substrate; a self-maintenance block on said substrate, said self-maintenance block comprising:
a first controller controlling servicing of said functional block during wafer-level servicing and during module-level servicing; anda second controller providing an interface between an off-chip tester and said first controller during said wafer-level servicing; and a plurality of interconnect structures on said substrate and integrating said self-maintenance block with an adjacent self-maintenance block of at least one adjacent integrated circuit chip in said stack such that, during said module-level servicing, a single second controller on a single integrated circuit chip in said stack provides an interface between said off-chip tester and each first controller on each of said integrated circuit chips in said stack. |
地址 |
Armonk NY US |