发明名称 |
Method of manufacturing semiconductor device |
摘要 |
According to one embodiment, a method includes forming a first SiGe layer having a first profile of a concentration of Ge on a semiconductor substrate, forming a second SiGe layer having a second profile of a concentration of Ge on the first SiGe layer, the second profile lower than a first peak of the first profile, forming a mask layer on the second SiGe layer, etching the first and second SiGe layers by anisotropic etching using the mask layer as a mask to form trenches, selectively removing the first SiGe layer exposed into the trenches to form a cavity under the second SiGe layer, and oxidizing side and lower surfaces of the second SiGe layer exposed in the trenches and the cavity to increase the concentration of Ge in the second SiGe layer. |
申请公布号 |
US8871615(B2) |
申请公布日期 |
2014.10.28 |
申请号 |
US201314021324 |
申请日期 |
2013.09.09 |
申请人 |
Kabushiki Kaisha Toshiba |
发明人 |
Mori Shinji |
分类号 |
H01L21/36;H01L21/20;H01L21/306;H01L21/02 |
主分类号 |
H01L21/36 |
代理机构 |
Finnegan, Henderson, Farabow, Garrett & Dunner, LLP |
代理人 |
Finnegan, Henderson, Farabow, Garrett & Dunner, LLP |
主权项 |
1. A method of manufacturing a semiconductor device, the method comprising:
forming a first SiGe layer having a first profile of a concentration of Ge on a semiconductor substrate; forming a second SiGe layer having a second profile of a concentration of Ge on the first SiGe layer, the second profile lower than a first peak of the first profile; forming a mask layer on the second SiGe layer; etching the first SiGe layer and the second SiGe layer by anisotropic etching using the mask layer as a mask to form trenches; selectively removing the first SiGe layer exposed into the trenches to form a cavity under the second SiGe layer; and oxidizing side and lower surfaces of the second SiGe layer exposed in the trenches and the cavity to increase the concentration of Ge in the second SiGe layer. |
地址 |
Tokyo JP |