Method of manufacturing semiconductor device

摘要

A method of manufacturing a semiconductor device which solves a problem with a burn-in process where current and voltage are applied to finished semiconductor devices at high-temperature. The method uses an organic multilayer wiring substrate for a burn-in board in which power supply/grounding wiring is formed with microscopic openings formed at least almost all over the areas around sockets over the front or back surface of the substrate. For increasing the supply voltage and reference voltage for the burn-in board and other purposes, whenever possible, signal wires are disposed in inner wiring layers of the board. The related-art burn-in board which has a solid or blanket-type conductor pattern in an outermost layer as wiring for supply or reference voltage may cause an insulating protective film over the metal wiring to peel due to weak adhesion between the wiring and film when thermal cycles are repeated. The method solves the problem.

主权项

1. A method of manufacturing a semiconductor device comprising the steps of:
(a) providing a plurality of semiconductor chips in which devices are formed; (b) assembling the plurality of semiconductor devices by forming an external terminal to be electrically connected with each of the semiconductor chips; (c) providing a burn-in board including a plurality of sockets over a front surface thereof; (d) performing a burn-in process on the semiconductor devices in such a state of loading the semiconductor devices in the sockets, respectively, the burn-in board further comprising: (x1) an organic multilayer wiring substrate including an internal signal wiring layer, a front side outermost power supply/grounding wiring layer, and a back side outermost power supply/grounding wiring layer; (x2) a front side power supply/grounding wiring which covers almost all of a front surface of the organic multilayer wiring substrate where the sockets are not provided, and which belongs to the front side outermost power supply/grounding wiring layer; (x3) a solder resist film which covers almost all of the front surface of the organic multilayer wiring substrate; and (x4) a plurality of microscopic openings formed over almost all of the front side power supply/grounding wiring that are covered and in contact with the solder resist film.