| 发明名称 |
Bit error generation system for optical networks |
| 摘要 |
A bit error generating device includes a light source, an input device, and a control processor. The control processor includes logic configured to: receive protocol or bitrate information regarding a live traffic signal via the input device; determine bit error simulation signal parameters based on the received protocol or bitrate information; configure the light source to generate the bit error simulation signal based on the bit error simulation signal parameters; and instruct the light source to inject the bit error simulation signal into an optical fiber carrying the live traffic signal. |
| 申请公布号 |
US8873949(B2) |
申请公布日期 |
2014.10.28 |
| 申请号 |
US201313933199 |
申请日期 |
2013.07.02 |
| 申请人 |
Verizon Patent and Licensing Inc. |
发明人 |
Kotrla Scott R.;Turlington Matthew W.;Bencheck Michael U.;Xia Tiejun J. |
| 分类号 |
H04B10/00 |
主分类号 |
H04B10/00 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A bit error generating device, comprising:
a light source; an input device; and a control processor that includes logic configured to:
receive protocol or bitrate information regarding a live traffic signal via the input device;determine bit error simulation signal parameters based on the received protocol or bitrate information;configure the light source to generate the hit error simulation signal based on the hit error simulation signal parameters; andinstruct the light source to inject the bit error simulation signal into an optical fiber carrying the live traffic signal. |
| 地址 |
Basking Ridge NJ US |
