Systems, pipeline stages, and computer readable media for advanced asynchronous pipeline circuits

摘要

Systems, pipeline stages, and computer readable media for advanced asynchronous pipeline circuits are disclosed. According to one aspect, the subject matter described herein includes a configurable system for constructing asynchronous application specific integrated data pipeline circuits. The system includes multiple modular circuit stages that are connectable with each other using transitional signaling and with other circuit elements to form multi-stage asynchronous application-specific integrated data pipeline circuits for asynchronously passing data through a series of stages based on a behavior implemented by each stage. The modular circuit stages each include sets of logic gates connected to each other for implementing the behaviors, the behaviors including at least one of conditional split, conditional select, conditional join, merge without arbitration, and stage arbitration.

主权项

1. An asynchronous pipeline stage using transitional signaling for implementing a conditional split, the stage comprising:
a data latch for receiving data from a first data input and sending the received data to at least one of a plurality of data outputs, and a data latch controller for controlling the data latch, wherein the data latch controller receives a first data request using transitional signaling and a selection request, selects one data request output from a plurality of data request outputs based on the value of the selection request, and sends the data request to the selected data request output, wherein controlling the latch includes changing the latch to a closed mode in response to receipt of the first data request and the selection request, and changing the latch to a transparent mode in response to receipt of a data acknowledge associated with the selected data request output.