发明名称 WIRING BOARD, SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF WIRING BOARD
摘要 PROBLEM TO BE SOLVED: To provide a wiring board capable of suppressing reduction in yield.SOLUTION: A wiring board 20 comprises: insulating layers 61 and 62 which are formed on the side of an upper surface 30A of a core substrate 30; a wiring layer 72 formed on the insulating layer 62; an insulating film 64 which is laminated on the insulating layer 62, covers the wiring layer 72 and includes a filler; and an insulating layer 65 which is laminated on the insulating layer 64, and does not include filler. The wiring board 20 also has: a via V5 penetrating the insulating layers 64 and 65 in a thickness direction; and a wiring layer 81 which is laminated on the insulating layer 65, and is electrically connected to the wiring layer 72 through the via V5.
申请公布号 JP2014204005(A) 申请公布日期 2014.10.27
申请号 JP20130079781 申请日期 2013.04.05
申请人 SHINKO ELECTRIC IND CO LTD 发明人 HARUHARA SATOSHI;YOSHIZAWA KEISUKE
分类号 H05K3/46;H01L23/12 主分类号 H05K3/46
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