| 主权项 |
1. A memory device comprising:
a first interconnect extending in a first direction; a plurality of second interconnects extending in a second direction intersecting with the first direction, and having lower ends positioned on the first interconnect; a plurality of third interconnects extending in a third direction intersecting with the second direction; a memory layer provided between the second interconnects and the third interconnects; and selectors respectively provided between the first interconnect and the lower ends of the plurality of second interconnects, the selectors including:
a first semiconductor layer of a first conductivity type;a second semiconductor layer of a second conductivity type;a third semiconductor layer provided between the first semiconductor layer and the second semiconductor layer, and the third semiconductor layer having an impurity concentration lower than an impurity concentration of the first semiconductor layer and an impurity concentration of the second semiconductor layer; anda gate electrode contacting with the third semiconductor layer via a gate insulating film, the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer respectively including polysilicon or polysilicon germanium, and the first semiconductor layer, the third semiconductor layer, and the second semiconductor layer respectively being aligned in the second direction. |
