| 发明名称 |
CONFIGURABLE AND LOW POWER ENCODER FOR CYCLIC ERROR CORRECTION CODES |
| 摘要 |
A method for encoding includes receiving input data symbols to be encoded with an Error Correction Code (ECC) so as to produce a code word of the ECC including redundancy symbols. The input data symbols are applied first and second processing stages, such that the first processing stage performs a first polynomial division by a fixed-coefficient polynomial with a first degree of parallelism, and the second processing stage performs a second polynomial division by a configurable-coefficient polynomial with a second degree of parallelism that is smaller than the first degree of parallelism, so as to jointly produce the redundancy symbols. |
| 申请公布号 |
US2014317478(A1) |
申请公布日期 |
2014.10.23 |
| 申请号 |
US201313865345 |
申请日期 |
2013.04.18 |
| 申请人 |
APPLE INC. |
发明人 |
Anholt Micha |
| 分类号 |
H03M13/05 |
主分类号 |
H03M13/05 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method for encoding, comprising:
receiving input data symbols, to be encoded with an Error Correction Code (ECC) so as to produce a code word of the ECC comprising redundancy symbols; and applying to the input data symbols first and second processing stages, such that the first processing stage performs a first polynomial division by a fixed-coefficient polynomial with a first degree of parallelism, and the second processing stage performs a second polynomial division by a configurable-coefficient polynomial with a second degree of parallelism that is smaller than the first degree of parallelism, so as to jointly produce the redundancy symbols. |
| 地址 |
Cupertino CA US |
