INTEGRATED CIRCUIT PACKAGE AND METHOD FOR MANUFACTURING THE SAME

摘要

A stacked integrated circuit package and a method for manufacturing the same are provided.;The stacked integrated circuit package includes a first integrated circuit package comprising a first substrate, a first semiconductor chip, and a first molding portion, an interposer mounted on the first substrate to be electrically connected to the circuit pattern of the first substrate by a first solder bump, the interposer being provided with an opening to accommodate the first semiconductor chip, and a second integrated circuit package stacked on the first integrated circuit package and the interposer and electrically connected to the interposer by a second solder bump, the second integrated circuit package comprising a second substrate, a second semiconductor chip, and a second molding portion.

主权项

1. A stacked integrated circuit package comprising:
a first integrated circuit package comprising a first substrate provided with a first circuit pattern, a first semiconductor chip mounted on the first substrate to be electrically connected to the first circuit pattern, and a first molding portion formed such that at least one surface of the first semiconductor chip is exposed; an interposer mounted on the first substrate to be electrically connected to the first circuit pattern of the first substrate by a first solder bump, the interposer being provided with an opening to accommodate the first semiconductor chip; and a second integrated circuit package stacked on the first integrated circuit package and the interposer and electrically connected to the interposer by a second solder bump, the second integrated circuit package comprising a second substrate provided with a second circuit pattern, a second semiconductor chip mounted on the second substrate to be electrically connected to the second circuit pattern, and a second molding portion formed to completely seal one surface of the second semiconductor chip and the second substrate.