发明名称 OPTIMIZATION OF MULTI-STAGE HIERARCHICAL NETWORKS FOR PRACTICAL ROUTING APPLICATIONS
摘要 Significantly optimized multi-stage networks, useful in wide target applications, with VLSI layouts using only horizontal and vertical links to route large scale sub-integrated circuit blocks having inlet and outlet links, and laid out in an integrated circuit device in a two-dimensional grid arrangement of blocks are presented. The optimized multi-stage networks in each block employ several rings of stages of switches with inlet and outlet links of sub-integrated circuit blocks connecting to rings from either left-hand side only, or from right-hand side only, or from both left-hand side and right-hand side; and employ shuffle exchange links where outlet links of cross links from switches in a stage of a ring in one sub-integrated circuit block are connected to either inlet links of switches in the another stage of a ring in the same or another sub-integrated circuit block.
申请公布号 US2014313930(A1) 申请公布日期 2014.10.23
申请号 US201414199168 申请日期 2014.03.06
申请人 Konda Technologies Inc. 发明人 Konda Venkat
分类号 H04L12/933 主分类号 H04L12/933
代理机构 代理人
主权项 1. A two-dimensional layout of hierarchical routing network comprising a total of a×b blocks with one side of said layout having the size of a blocks and the other side of said layout having the size of b blocks where a≧1 and b≧1, and Said routing network comprising a total of N1 inlet links and a total of N2 outlet links wherein either N2=N1×d2, N1=(a×b)×d, and said each block comprising d inlet links and d×d2 outlet links, and said each block comprising r rings where d2=r×p, and yr hierarchical stages in each said ring, (i.e., the number of stages in ring 1 is y1, the number of stages in ring 2 is y2, . . . , and the number of stages in ring r is yr), where r≧1; p≧2; or N1=N2×d1, N2=(a×b)×d, and said each block comprising d outlet links and d×d1 inlet links, and said each block comprising r rings where d1=r×p, and yr hierarchical stages in each said ring, (i.e., the number of stages in ring 1 is y1, the number of stages in ring 2 is y2, . . . , and the number of stages in ring r is yr), where r≧1, p≧2, yr≧1; and Said each stage comprising a switch of size d×d, where d≧4 and each said switch of size d×d having d incoming links and d outgoing links; and Said all inlet links are connecting to one or more of the said incoming links of any said switch of any stage of any ring of any block, and said all outlet links are connecting from one or more of the said outgoing links of any said switch of any stage of any ring of any block, Said incoming links and outgoing links in each switch in said each stage of said each block comprising a plurality of forward connecting links connecting from switches in lower stage to switches in the immediate succeeding higher stage in the same ring, and also comprising a plurality of backward connecting links connecting from switches in higher stage to switches in the immediate preceding lower stage in the same ring; and Said forward connecting links comprising a plurality of straight links connecting from a switch in a stage of a ring in a block to a switch in another stage of the same ring in the same block and also comprising a plurality of cross links connecting from a switch in a stage of a ring in a block to a switch in another stage of another ring in the same block or to a switch in another stage of another ring in a different block, and Said backward connecting links comprising a plurality of straight links connecting from a switch in a stage of a ring in a block to a switch in another stage of the same ring in the same block and also comprising a plurality of cross links connecting from a switch in a stage of a ring in a block to a switch in another stage of another ring the same block or to a switch in another stage of another ring in a different block.
地址 San Jose CA US