| 摘要 |
<p>A decoder circuit that can prevent the delay of decoder output includes a switch that is put into an ON state when a node A of an NMOS region is not an output channel of a selected gradation voltage. The switch is connected to the node A. Thus, a voltage raised by electric charges accumulated by a coupling capacity C1 caused in the node A when the gradation voltage is outputted from an output terminal of the decoder output can be discharged by the switch in the ON state.</p> |
