发明名称 BOOLEAN LOGIC IN A STATE MACHINE LATTICE
摘要 Disclosed are methods and devices, among which is a device that includes a finite state machine lattice. The lattice may includes a programmable Boolean logic cell that may be programmed to perform various logic functions on a data stream. The programmability includes an inversion of a first input to the Boolean logic cell, an inversion of a last output of the Boolean logic cell, and a selection of an AND gate or an OR gate as a final output of the Boolean logic cell. The Boolean logic cell also includes end of data circuitry configured to cause the Boolean logic cell to only output after an end of data signifying the end of a data stream is received at the Boolean logic cell.
申请公布号 EP2791835(A1) 申请公布日期 2014.10.22
申请号 EP20120808996 申请日期 2012.12.05
申请人 MICRON TECHNOLOGY, INC. 发明人 NOYES, HAROLD B;BROWN, DAVID R.;GLENDENNING, PAUL;XU, IRENE J.
分类号 G06F17/50 主分类号 G06F17/50
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