发明名称 半導体装置及びデータ処理システム
摘要 <p>A semiconductor device has reduced power consumption and processing time associated with the release of a low power consumption state set by a central processing unit thereof. The semiconductor device controls a relationship between a forcible release and reset of the low power consumption state previously set by the central processing unit. In one embodiment, a forcible release control circuit forcibly releases the supply and stop of power and clocks previously set to one or more controlled circuits, only during a period required by a signal outputted from a requesting circuit, which requesting circuit may be either internal to the device or external to the device. Once the request signal from the requesting circuit has ended, the controlled circuits and, if appropriate, the central processing unit as well, are restored to the original low power consumption state.</p>
申请公布号 JP5610566(B2) 申请公布日期 2014.10.22
申请号 JP20100035604 申请日期 2010.02.22
申请人 发明人
分类号 G06F1/32;G06F1/04;G06F1/26;G06F15/78 主分类号 G06F1/32
代理机构 代理人
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