发明名称 不揮発性メモリコントローラ及び不揮発性記憶装置
摘要 <p>A flash memory unit includes a plurality of physical blocks including a plurality of memory cells and serving as erase units of data, wherein each of the memory cells is capable of recording information of 1 bit or more and degradation in the characteristics of the memory cells differs according to the amount of information that is recorded. A controller includes a control unit for controlling the reading, writing and erasure of data to and from the flash memory unit, and a degradation level table for recording a degradation level of the memory cells in physical block units. The control unit stores, in the degradation level table, the degradation level of the memory cells according to the amount of information stored in the memory cells for each cycle of data erasure from the physical blocks.</p>
申请公布号 JP5612508(B2) 申请公布日期 2014.10.22
申请号 JP20110039857 申请日期 2011.02.25
申请人 发明人
分类号 G11C16/02;G06F12/16;G11C16/04 主分类号 G11C16/02
代理机构 代理人
主权项
地址
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