Extensible network-on-chip

摘要

#CMT# #/CMT# The circuit i.e. processor matrix (PA1), has computing nodes (N) arranged in matrix, and a network extension module (42) provided at each end of line/column of the matrix. Series-parallel-series converters (SERDES) form outgoing and incoming channels to respectively transmit data in series on bus segment by an external terminal (40) of the circuit and the data arriving in series on another terminal in parallel to the segment. A load distributor, common to the modules of edge of the matrix, distributes the outgoing channels between the segments for which an outgoing transmission is in progress. #CMT#USE : #/CMT# Integrated circuit i.e. processor matrix. #CMT#ADVANTAGE : #/CMT# The design of the circuit increases computing power of the circuit without affecting development tools of programs for matrices of processors. #CMT#DESCRIPTION OF DRAWINGS : #/CMT# The drawing shows a schematic view of network extension modules. N : Computing nodes PA1, PA2 : Processor matrices SERDES : Series-parallel-series converters S1, S2 : Switches 40 : External terminal 42 : Network extension module.