发明名称 データ処理システムおよびデータを処理するための方法
摘要 <p>A circuit arrangement for a data processing system is configured to process data in a plurality of modules. The circuit arrangement is configured such that each module is provided with at least one clock pulse, a time base and a base of at least one additional physical variable. The circuit arrangement also comprises a central routing unit to which the plurality of modules are coupled and via which the plurality of modules can periodically exchange data amongst themselves, based on the time base and/or the base of other physical variables. Each module is configured independently and parallel to other modules of the plurality of modules in order to process data. The circuit arrangement is employed in a corresponding method.</p>
申请公布号 JP5611446(B2) 申请公布日期 2014.10.22
申请号 JP20130501728 申请日期 2011.03.16
申请人 发明人
分类号 G06F9/48 主分类号 G06F9/48
代理机构 代理人
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