| 摘要 |
<p>Gate-rounding fabrication techniques can be implemented to increase an effective channel length of a transistor and to consequently reduce the leakage current and static power consumption associated with the transistor. The transistor comprises a substrate region that includes a source region and a drain region. The transistor can also comprise a gate region that includes a main gate portion, one or more gate tips, and one or more corresponding gate-rounded portions. Each of the one or more gate tips is formed at a suitable position along the side of the main gate portion. During fabrication, the junction between the main gate region and each of the gate tips takes on a rounded shape to form a corresponding gate-rounded region. The gate-rounded regions increase the average length of the gate region and the effective channel length of the transistor.</p> |
