发明名称 メモリ装置およびメモリシステム
摘要 A memory device includes a plurality of nonvolatile memories configured to be erased at updating of data, and a memory controller configured to control the nonvolatile memory. The memory controller includes an address conversion table configured to convert a logical address specified by at data writing into a physical address of the nonvolatile memory, an erased physical block managing unit configured to manage an erased physical block address, the nonvolatile memory of the erased physical block address, and an erased physical block count on each nonvolatile memory, an erasable physical block managing unit configured to manage an erasable physical block address, the nonvolatile memory of the erasable physical block address, and an erasable physical block count on each nonvolatile memory, and a memory control unit configured to control writing and erasing on the plurality of nonvolatile memories.
申请公布号 JP5609683(B2) 申请公布日期 2014.10.22
申请号 JP20110018909 申请日期 2011.01.31
申请人 发明人
分类号 G06F12/06;G06F12/00 主分类号 G06F12/06
代理机构 代理人
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