发明名称 Device and methods for forming partially self-aligned trenches
摘要 A semiconductor device and methods for small trench patterning are disclosed. The device includes a plurality of gate structures and sidewall spacers, an etch stop layer disposed over the sidewall spacers, an interlayer dielectric (ILD) layer disposed on a bottom portion of the etch stop layer, an etch buffer layer disposed on an upper portion of the etch stop layer, and a plurality of metal plugs between the gate structures. An upper portion of the metal plugs is adjacent to the etch buffer layer and a lower portion of the metal plugs is adjacent to the ILD layer.
申请公布号 US8865595(B2) 申请公布日期 2014.10.21
申请号 US201213343771 申请日期 2012.01.05
申请人 Taiwan Semiconductor Manufacturing Company, Ltd. 发明人 Chang Ya Hui
分类号 H01L21/44 主分类号 H01L21/44
代理机构 Haynes and Boone, LLP 代理人 Haynes and Boone, LLP
主权项 1. A method of making a semiconductor device, the method comprising: forming a gate structure over a semiconductor substrate; forming a sidewall spacer adjoining a sidewall of the gate structure; forming an etch stop layer over the sidewall spacer; forming a first interlayer dielectric (ILD) layer over the etch stop layer; planarizing the first ILD layer; forming an etch buffer layer over the planarized first ILD layer; forming a second ILD layer over the etch buffer layer; forming trenches in the second ILD layer and the etch buffer layer; filling the trenches with a conductive material; and planarizing the conductive material.
地址 Hsin-Chu TW