发明名称 Chip package
摘要 A chip package comprising a carrier, a chip, a plurality of first conductive elements, an encapsulation, and a conductive film is provided. The carrier has a carrying surface and a back surface opposite to the carrying surface. Furthermore, the carrier has a plurality of common contacts in the periphery of the carrying surface. The chip is disposed on the carrying surface and electrically connected to the carrier. In addition, the first conductive elements are disposed on the common contacts respectively. The encapsulation is disposed on the carrying surface and encapsulating the chip. Moreover, the conductive film is disposed over the encapsulation and the first conductive elements, so as to electrically connect with the common contacts via the first conductive elements. A process for fabricating the chip package is further provided. The chip package is capable of preventing the EMI problem and thus provides superior electrical performance.
申请公布号 US8866280(B2) 申请公布日期 2014.10.21
申请号 US200912491742 申请日期 2009.06.25
申请人 Advanced Semiconductor Engineering, Inc. 发明人 Choi Soo-Min;Kim Hyeong-No;An Jae-Sun;Lee Young-Gue;Cha Sang-Jin
分类号 H01L23/36;H01L23/31;H01L23/552;H01L23/00 主分类号 H01L23/36
代理机构 Foley & Lardner LLP 代理人 Foley & Lardner LLP ;Liu Cliff Z.;Murch Angela D.
主权项 1. A chip package, comprising: a carrier, including a carrying surface, a back surface opposite to the carrying surface, and a first side surface surrounding and connected between the carrying surface and the back surface, the carrier further including a plurality of common contacts adjacent to the periphery of the carrying surface; a chip, disposed adjacent to the carrying surface and electrically connected to the carrier; a plurality of conductive elements, disposed adjacent to and connected to the common contacts respectively; an encapsulation, covering the carrying surface and encapsulating the chip and the conductive elements; and a conductive film, provided with a second side surface and directly attached on a top surface of the encapsulation to cover and connect with the conductive elements, wherein the first side surface of the carrier is coplanar with the second side surface of the conductive film, and wherein the carrier further comprises at least one extending contact adjacent to the carrying surface, the extending contact is electrically connected with the common contacts via interconnections in the carrier, and the chip is electrically connected with the extending contact to attain a common voltage from the common contacts.
地址 Kaohsiung TW