Semiconductor device with substrate-side exposed device-side electrode and method of fabrication

摘要

A semiconductor device with substrate-side exposed device-side electrode (SEDE) is disclosed. The semiconductor device has semiconductor substrate (SCS) with device-side, substrate-side and semiconductor device region (SDR) at device-side. Device-side electrodes (DSE) are formed for device operation. A through substrate trench (TST) is extended through SCS, reaching a DSE turning it into an SEDE. The SEDE can be interconnected via conductive interconnector through TST. A substrate-side electrode (SSE) and a windowed substrate-side passivation (SSPV) atop SSE can be included. The SSPV defines an area of SSE for spreading solder material during device packaging. A device-side passivation (DSPV) beneath thus covering the device-side of SEDE can be included. A DSE can also include an extended support ledge, stacked below an SEDE, for structurally supporting it during post-wafer processing packaging. The projected footprint of extended support ledge onto the major SCS plane can essentially enclose the correspondingly projected footprint of SEDE.

主权项

1. A semiconductor device with substrate-side exposed device-side electrode (SEDE), the semiconductor device comprising:
a semiconductor substrate (SCS) having a device-side, a substrate-side opposite the device side and a semiconductor device region (SDR) located at the device-side; a plurality of device-side electrodes (DSE) formed upon the device-side and in contact with the SDR for operation of the semiconductor device; at least one through substrate trench (TST) extending through the SCS, reaching a DSE thus turning it into an SEDE; and a device-side passivation (DSPV) and, corresponding to at least one SEDE, a pre-determined member of the DSEs, other than said at least one SEDE, comprises an extended support ledge, stacked below while separated from said at least one SEDE with the DSPV, for structurally supporting said at least one SEDE during post-wafer processing packagingwhereby the SEDE can be interconnected via a conductive interconnector through the TST.