Error correction in a stacked memory

摘要

Electronic apparatus, systems, and methods to construct and operate the electronic apparatus and/or systems include a stack of memory dies with user data and/or first level error correction data stored in a stripe across the memory dies. One such stack can include a second level error correction vault, such as a parity vault, to store parity data corresponding to the user data and/or first level error correction data. Additional apparatus, systems, and methods are disclosed.

主权项

1. An apparatus comprising:
a stack of memory dies partitioned into a plurality of data vaults, the stack arranged to store user data in a stripe across the data vaults; a vault to operatively store second level error correction data corresponding to the user data; a spare vault that has not been allocated for either the user data or correction data; and a logic die operatively coupled to the stack of memory dies, the logic die structured to control management of allocation of data vaults to the stripe, the logic die configured to control operation of the spare vault available to store user data, first level error correction data, or both user data and first level error correction data upon determining that one of the data vaults has become a faulty data vault.