Power tracking circuit and semiconductor apparatus including the same

摘要

A semiconductor device having a power tracking circuit configured for activating a power tracking signal for a period corresponding to a period during which an external voltage retains a level lower than a level of a low power mode reference voltage if the external voltage retains the level lower than the level of the low power mode reference voltage for at least a preselected time.

主权项

1. A power tracking circuit comprising:
a voltage detection unit configured to detect a level of an external voltage on the basis of a reference voltage and generate a detection signal; a first pulse generation unit configured to generate a first pulse signal when a level of the detection signal transitions from a first level to a second level; a first delay unit configured to delay the first pulse signal by a first predetermined time; a set signal generation unit configured to activate a set signal if, when at an activation timing of the delayed first pulse signal the detection signal retains the second level; a second pulse generation unit configured to generate a second pulse signal when a level of the detection signal transitions from the second level to the first level; a second delay unit configured to delay the second pulse signal by a second predetermined time; a reset signal generation unit configured to activate a reset signal if, when at an activation timing of the delayed second pulse signal the detection signal retains the first level; and a latch unit configured to activate a power tracking signal in response to the set signal and deactivate the power tracking signal in response to the reset signal.