| 发明名称 | Power semiconductor devices and fabrication methods | ||
| 摘要 | We describe a RESURF semiconductor device having an n-drift region with a p-top layer and in which a MOS (Metal Oxide Semiconductor) channel of the device is formed within the p-top layer. | ||
| 申请公布号 | US8866252(B2) | 申请公布日期 | 2014.10.21 |
| 申请号 | US201113233672 | 申请日期 | 2011.09.15 |
| 申请人 | Cambridge Semiconductor Limited | 发明人 | Trajkovic Tanya;Udrea Florin;Pathirana Vasantha;Udugampola Nishad |
| 分类号 | H01L23/58;H01L29/66;H01L29/78;H01L29/739;H01L29/10;H01L29/06;H01L29/423 | 主分类号 | H01L23/58 |
| 代理机构 | Tarolli, Sundheim, Covell & Tummino LLP | 代理人 | Tarolli, Sundheim, Covell & Tummino LLP |
| 主权项 | 1. A double RESURF semiconductor device having an n-drift region with a p-top layer, and wherein a MOS (Metal Oxide Semiconductor) channel of said device is formed within said p-top layer, wherein said p-top layer comprises a first p-top portion in or adjacent said n-drift region, and a second p-top portion adjacent to an n+region or p-well region of a source structure of said device, and wherein the first and second p-top portions are laterally spaced to one another and wherein the device is configured such that a surface field of said n-drift region of said device is reduced by said first p-top region when said device is off and in a blocking mode. | ||
| 地址 | Cambridge GB | ||