Simultaneously tagging of semiconductor components on a wafer

摘要

Methods and apparatus are disclosed to simultaneously, wirelessly test semiconductor components formed on a semiconductor wafer. The semiconductor components transmit respective outcomes of a self-contained testing operation to wireless automatic test equipment via a common communication channel. Multiple receiving antennas observe the outcomes from multiple directions in three dimensional space. The wireless automatic test equipment determines whether one or more of the semiconductor components operate as expected and, optionally, may use properties of the three dimensional space to determine a location of one or more of the semiconductor components. The wireless testing equipment may additionally determine performance of the semiconductor components by detecting infrared energy emitted, transmitted, and/or reflected by the semiconductor wafer before, during, and/or after a self-contained testing operation.

主权项

1. A wireless automatic test equipment for simultaneously testing a plurality of semiconductor components formed onto a semiconductor wafer, comprising:
a transmitter module configured to simultaneously send a plurality of initiate self-contained testing operation signals to the plurality of semiconductor components; a receiver module configured to receive a plurality of testing operation outcomes from the plurality of semiconductor components over a common communication channel to provide a plurality of recovered testing outcomes, each of the plurality of recovered testing outcomes having a corresponding innate identification number from among a plurality of unique identification numbers that identifies one of the plurality of semiconductor components and indicating whether its respective semiconductor component operates as expected; and a testing processor configured to determine a first group of semiconductor components from among the plurality of semiconductor components that operate as expected based upon the plurality of recovered testing outcomes and corresponding first locations of the first grotto of semiconductor components within the semiconductor wafer based upon their corresponding unique identification numbers from among the identification numbers.