Apparatus, systems and methods for for digital testing of ADC/DAC combination

摘要

A circuit for testing digital-to-analog (DAC) and analog-to-digital converters (ADC) is provided. The circuit applies a code pattern having a plurality of sequential values to the digital to analog converter. A plurality of built-in test switches (BTS) couple at least one tap voltage from the DAC to a test bus and to the ADC as a variable reference input voltage. In one form, the circuit uses incremental digital codes to test for defects in a resistor string, a switch array, and a decode logic that form part of the DAC. In another form, the circuit uses the tap voltages from the DAC to test the comparators that form part of the ADC. Instead of performing time-consuming analog to digital conversions, the functionality of the above mentioned circuitry is tested by varying the code pattern around a reference point and by selecting the appropriate combination of BTS switches.

主权项

1. A testing circuit comprising:
a plurality of built-in test switches capable of coupling at least one tap voltage from a digital to analog converter (DAC) to a test bus and capable of providing an analog to digital converter (ADC) with a variable reference input voltage; a test pattern generator capable of generating a code pattern having a plurality of sequential values; and a test controller having an input terminal connected to the test bus, thereby receiving an output signal from the ADC and DAC resulting from application of the code pattern to the DAC and control of the plurality of built-in test switches;
wherein the test controller is capable of configuring the plurality of built-in test switches between a test-mode operation and a normal-mode operation.