Matrix phase detector

摘要

A method and a system are provided for clock phase detection. A first set of delayed versions of a first clock signal is generated and a second set of delayed versions of a second clock signal is generated. The second set of delayed versions of the second clock signal is sampled using the first set of delayed versions of the first clock signal to produce an array of clock samples in a domain corresponding to the first clock signal. At least one edge indication is located within the array of clock samples.

主权项

1. A method comprising:
generating a first set of delayed versions of a first clock signal; sampling the first clock signal using the first set to produce a sequence of first clock samples in a domain corresponding to the first clock signal; generating a second set of delayed versions of a second clock signal; sampling the second set using the first set to produce an array of clock samples in the domain corresponding to the first dock signal; and locating at least one edge indication within the array of clock samples.