发明名称 SEQUENCE CIRCUIT
摘要 A sequence circuit includes a power output terminal, first to third power input terminals, first to sixth resistors, first to tenth filed effect transistors (FETs), first to third inductors, a first capacitor, a second capacitor, and first to third drivers. The sequence circuit ensures that different voltages work in a correct sequence.
申请公布号 US2014306685(A1) 申请公布日期 2014.10.16
申请号 US201414251668 申请日期 2014.04.14
申请人 HONG FU JIN PRECISION INDUSTRY (ShenZhen) CO., LTD. ;HON HAI PRECISION INDUSTRY CO., LTD. 发明人 ZHOU HAI-QING
分类号 H02M3/158 主分类号 H02M3/158
代理机构 代理人
主权项 1. A sequence circuit, comprising: first to third power input terminals, first to sixth resistors, first to fourth filed effect transistors (FETs), a first capacitor, and a first driver, wherein: the first power input terminal is grounded through the first and second resistors in that order, the first capacitor and the second resistor are connected in parallel; a node between the first and second resistors is connected to a gate of the first FET, a source of the first FET is grounded, a drain of the first FET is connected to a gate of the second FET, the gate of the second FET is connected to the second power input terminal through the third resistor, a source of the second FET is connected to the second power input terminal, a drain of the second FET is connected to a power pin of a pulse width management (PWM) controller, the drain of the second FET is grounded through the fourth resistor, the gate of the first FET is connected to a gate of the third FET, a source of the third FET is grounded, a drain of the third FET is connected to the third power input terminal through the fifth resistor, a drain of the third FET is connected to a gate of the fourth FET, a source of the fourth FET is grounded, a drain of the fourth FET is connected to the power pin of the PWM controller through the sixth resistor, the power pin of the PWM controller is connected to a power pin of the first driver, the first FET, the third FET and the fourth FET are n-channel, the second FET is p-channel, and a voltage of high level is input to the third power input terminal constantly.
地址 Shenzhen CN