发明名称 RESET CIRCUIT
摘要 PROBLEM TO BE SOLVED: To enable stable voltage monitoring of two systems without using a power supply other than a power supply monitored by a single input port.SOLUTION: A reset circuit 10 comprises: a first power supply (3.3 V); a first reset circuit (11) having an input terminal connected to the first power supply; a second power supply (5.0 V); a second reset circuit (12) having an input terminal connected to the second power supply; a first resistor (R2) having one end connected to the first power supply; a second resistor (R1) having one end connected to the second power supply; a circuit to be reset (13) reset by the first reset circuit or the second reset circuit and having an input port; and a PNP transistor (TR1) having an emitter connected to an output terminal of the first reset circuit, the other end of the first resistor, and the input port, having a base connected to an output terminal of the second reset circuit and the other end of the second resistor, and having a collector connected to the ground.
申请公布号 JP2014197791(A) 申请公布日期 2014.10.16
申请号 JP20130072970 申请日期 2013.03.29
申请人 FUJITSU GENERAL LTD 发明人 TAGAMI YASUO
分类号 H03K17/22;G06F1/24 主分类号 H03K17/22
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