LIQUID CRYSTAL DISPLAY AND DRIVING METHOD THEREOF

摘要

A liquid crystal display, the liquid crystal display comprises a plurality of gate lines which includes a first gate line, a transformation gate line, and a second gate line; a data line; and a pixel, wherein the pixel includes a first liquid crystal capacitor which includes a first sub-pixel electrode and a common electrode and a second liquid crystal capacitor which includes a second sub-pixel electrode and a common electrode; a first switching element connected to the first gate line, the data line, and the first sub-pixel electrode; a second switching element connected to the first gate line, the data line, and the second sub-pixel electrode; a third switching element connected to the transformation gate line and the second switching element; a transformation capacitor which includes a first terminal connected to the second gate line and a second terminal connected to the third switching element; and a first period where a gate-on voltage Von is applied to the first gate line and a second period where the gate-on voltage Von is applied to the transformation gate line do not overlap each other and, a gate-off voltage Voff is applied to the second gate line during the second period.

主权项

1. A liquid crystal display, the liquid crystal display comprising:
a plurality of gate lines which includes a first gate line, a transformation gate line, and a second gate line; a data line; and a pixel, wherein the pixel includes:
a first liquid crystal capacitor which includes a first sub-pixel electrode and a common electrode, and a second liquid crystal capacitor which includes a second sub-pixel electrode and a common electrode;a first switching element connected to the first gate line, the data line, and the first sub-pixel electrode;a second switching element connected to the first gate line, the data line, and the second sub-pixel electrode;a third switching element connected to the transformation gate line and the second switching element;a transformation capacitor which includes a first terminal directly connected to the second gate line and a second terminal connected to the third switching element.