发明名称 METHOD FOR MANUFACTURING SEMICONDUCTOR PACKAGE, SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR DEVICE
摘要 <p>PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor package capable of forming a circuit on an insulation layer covering a semiconductor device, and forming a via for electrically connecting the circuit to an electrode of the semiconductor device with a high degree of accuracy.SOLUTION: A method for manufacturing a semiconductor package is used in which a resin coating layer 17 is formed on a surface of an electrode 13a side of a coating insulation layer 22 having a convex part 12a with a predetermined shape on a surface at the electrode side of a semiconductor device 13 so as to embed the semiconductor device 13, a circuit pattern part 18 having a recess 18a reaching a surface of the electrode 13a and a circuit trench 18b with a desired shape and depth reaching the convex part 12, is formed by laser-processing the coating insulation layer 22 from an outer surface side of the resin coating film 17, and after a plating catalyst or its precursor 19 coats its surface, the resin coating film 17 is peeled off and its surface is electroless-plated to simultaneously form a via 20a and a circuit 20b.</p>
申请公布号 JP2014197570(A) 申请公布日期 2014.10.16
申请号 JP20110244786 申请日期 2011.11.08
申请人 PANASONIC CORP 发明人 TAKASHITA HIROMITSU;TAKEDA TAKESHI;KASHIWABARA KEIKO;FUJIWARA HIROAKI;YOSHIOKA SHINGO
分类号 H01L23/12 主分类号 H01L23/12
代理机构 代理人
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