ENHANCED FLASH CHIP AND CHIP PACKAGING METHOD

摘要

An enhanced flash chip and a chip packaging method, the flash chip comprising: a flash and a replay-protected monotonic counter (RPMC) packaged together, the flash and the RPMC each comprising a first internal IO pin and/or a second internal IO pin; and a jumper window disposed on the flash and/or RPMC. One side of the jumper window is connected to the first internal IO pin of the flash and/or RPMC, and the other side of the jumper window is connected to the first internal IO pin of the flash and/or RPMC; the second internal IO pin of the flash is connected to the second internal IO pin of the RPMC. The flash chip provided in the present application effectively reduces design complexity and chip manufacturing cost, and avoids lead wire intersecting in chip packaging, thereby increasing chip packaging yield.