| 摘要 |
In one embodiment, a system for determining latency in paths includes logic integrated with and/or executable by a processor, the logic being adapted to synchronize clocks of two devices connected via two or more link aggregation(LAG)ports and/or multiple devices within paths through a network fabric, determine a transit delay for each LAG port and/or path, store the transit delay for each LAG port to a LAG structure along with an identifier for the LAG port and/or for each path to an equal cost multi-path (ECMP) structure along with an identifier of the path, sort the LAG ports according to each LAG port's transit delay and mark a LAG port having the lowest latency, and sort the paths according to each path's transit delay and mark a path having the lowest latency, wherein each path has an equal path cost factor. |
