发明名称 Semiconductor integrated circuit and exponent calculation method
摘要 Provided is a semiconductor integrated circuit and an exponent calculation method that, when normalizing a plurality of data by a common exponent, speed up exponent calculation and reduce circuit scale and power consumption. When normalizing a plurality of data by a common exponent, a semiconductor integrated circuit calculates the exponent of the plurality of data. Included is a bit string generator that generates a second bit string containing bits having a transition value indicating that values of adjacent bits are different or a non-transition value indicating that values of adjacent bits are not different for each pair of adjacent bits of a first bit string constituting the data, and an exponent calculator that calculates the exponent of the plurality of data based on bit position of the transition value of a plurality of second bit strings generated from a plurality of first bit strings respectively constituting the plurality of data.
申请公布号 US8862647(B2) 申请公布日期 2014.10.14
申请号 US201113262748 申请日期 2011.04.12
申请人 NEC Corporation 发明人 Shibayama Atsufumi
分类号 G06F7/00;G06F15/00;H03M7/24 主分类号 G06F7/00
代理机构 Young & Thompson 代理人 Young & Thompson
主权项 1. A semiconductor integrated circuit that, when normalizing a plurality of block floating point data included in a block by a common exponent, calculates the exponent of the plurality of data, comprising: a bit string storage unit; a plurality of bit string generators that generate a second bit string containing bits having a transition value indicating that values of adjacent bits are different or a non-transition value indicating that values of adjacent bits are not different for each pair of adjacent bits of a first bit string constituting the data, in each operation cycle; a bit string composer that, based on a plurality of second bit strings corresponding to the number of the plurality of bit string generators generated by the plurality of bit string generators, generates a third bit string in which, when a bit in the same position is the transition value in at least one of the plurality of second bit strings, a bit corresponding to the position has a first value, and, when a bit in the same position is the non-transition value in all of the plurality of second bit strings, a bit corresponding to the position has a second value, and stores the third bit string into the bit string storage unit, in each operation cycle; and a bit position detector that calculates the exponent of the plurality of data based on a bit position of the first value in the third bit string stored in the bit string storage unit,wherein when the third bit string is stored in the bit string storage unit, the bit string composer generates the third bit string in which, when a bit in the same position is the transition value in at least one of the plurality of second bit strings and the third bit string, a bit corresponding to the position has the first value, and, when a bit in the same position is the non-transition value in all of the plurality of second bit strings and the third bit string, a bit corresponding to the position has the second value, and updates the third bit string stored in the bit string storage unit to the generated third bit string, the bit position detector calculates the exponent according to an input of a block end signal indicating the last operation cycle in the block, and the bit string storage unit deletes the third bit string stored in the bit string storage unit according to the input of the block end signal indicating the last operation cycle in the block.
地址 Tokyo JP