Gate stack of boron semiconductor alloy, polysilicon and high-k gate dielectric for low voltage applications

摘要

A method of forming a gate structure for a semiconductor device that includes forming a non-stoichiometric high-k gate dielectric layer on a semiconductor substrate, wherein an oxide containing interfacial layer can be present between the non-stoichiometric high-k gate dielectric layer and the semiconductor substrate. At least one gate conductor layer may be formed on the non-stoichiometric high-k gate dielectric layer. The at least one gate conductor layer comprises a boron semiconductor alloy layer. An anneal process is applied, wherein during the anneal process the non-stoichiometric high-k gate dielectric layer removes oxide material from the oxide containing interfacial layer. The oxide containing interfacial layer is thinned by removing the oxide material during the anneal process.

主权项

1. A method of forming a gate structure for a semiconductor device comprising:
forming a non-stoichiometric high-k gate dielectric layer on a semiconductor substrate, wherein an oxide containing interfacial layer is present between the non-stoichiometric high-k gate dielectric layer and the semiconductor substrate; forming at least one gate conductor layer including a boron semiconductor alloy layer on the non-stoichiometric high-k gate dielectric layer, wherein the at least one gate conductor layer including a boron semiconductor alloy layer reduces a strength of an electric field that is produced during burn in when compared to a similarly structured semiconductor device having a metal gate conductor; and annealing said non-stoichiometric high-k gate dielectric layer, after forming said at least one gate conductor layer, to remove oxide material from the oxide containing interfacial layer, wherein the oxide containing interfacial layer is thinned by removing the oxide material during said annealing.