发明名称 Pixel matrix with compensation of ohmic drops on the power supplies
摘要 A matrix microelectronic device includes elementary cells laid out according to a matrix. Each cell has a current source formed by a current source transistor. A source electrode of the transistor is connected to a source biasing conductor line of a plurality of source biasing conductor lines. A gate electrode of the transistor is connected to a gate biasing conductor line of a plurality of gate biasing conductor lines. A biasing device biases the gate biasing conductor lines and includes at least one first connection line that is connected to at least several of the gate biasing conductor lines. The biasing device includes a voltage generator or a current generator that causes a variation of potentials along the first connection line, thereby compensating a corresponding variation of potentials along the source biasing conductor lines. The device can include an addressing circuit for addressing horizontal lines or rows of the matrix.
申请公布号 US8859979(B2) 申请公布日期 2014.10.14
申请号 US200812242057 申请日期 2008.09.30
申请人 Commissariat a l'Energie Atomique 发明人 Peizerat Arnaud;Arques Marc;Martin Jean-Luc
分类号 G01T1/24;H01L25/00;H01L27/00;H04N5/32;H04N5/369;H04N5/374 主分类号 G01T1/24
代理机构 Pearne & Gordon LLP 代理人 Pearne & Gordon LLP
主权项 1. Matrix microelectronic device comprising: a plurality of elementary cells laid out according to a matrix, each elementary cell of said plurality of elementary cells comprising at least one current source formed by at least one current source transistor, a source electrode of said current source transistor being connected to a source biasing conductor line, wherein the matrix microelectronic device comprises a plurality of source biasing conductor lines each connecting source electrodes of current source transistors of a respective given row of cells of the matrix, a gate electrode of said current source transistor being connected to a gate biasing conductor line, wherein the matrix microelectronic device comprises a plurality of gate biasing conductor lines each connecting gate electrodes of current source transistors of a respective different row of cells of the matrix that is orthogonal to said given row, wherein the matrix microelectronic device further comprises: a biasing device for biasing the gate biasing conductor lines, said biasing device comprising: at least one first connection line that is connected to at least several of said gate biasing conductor lines, and a voltage generator comprising a first device for applying a first potential to a first end of said first connection line and a second device for applying a second potential to a second end of said first connection line, opposite the first end, wherein said first connection line is provided with a linear resistance that is identical or substantially equal to or proportional to a respective linear resistance of said source biasing conductor lines and said voltage generator causes a decrease of potentials along said first connection line thereby compensating a corresponding decrease of potentials along the source biasing conductor lines.
地址 Paris FR