发明名称 Programmable integrated circuits with redundant circuitry
摘要 Integrated circuits with repairable logic regions are provided. Each logic region may be organized into a predetermined number of rows of logic circuitry, one of which serves as a spare row. A repairable region may be operable in normal mode or redundant mode. In normal mode, the spare row is deactivated. When one of the logic region rows contains defective circuitry, that logic region is operated in redundant mode so that each row below the bad row is shifted down by one row and the spare row is engaged to serve as the last row to repair that region. Each row may include a multiplexer and an associated driver that drives a corresponding vertical routing segment from one row to the next. Each vertical routing segment has the option of being driven by its logically equivalent vertical wire in the immediate preceding row by configuring the corresponding multiplexer.
申请公布号 US8860460(B1) 申请公布日期 2014.10.14
申请号 US201213669244 申请日期 2012.11.05
申请人 Altera Corporation 发明人 Cashman David
分类号 H03K19/177 主分类号 H03K19/177
代理机构 Treyz Law Group 代理人 Treyz Law Group ;Tsai Jason
主权项 1. An integrated circuit, comprising: a logic region having a plurality of rows of circuitry including a spare row of circuitry; a plurality of routing segments each of which has a first end coupled to a respective one of the rows of circuitry and an opposing second end coupled to an adjacent one of the rows of circuitry; and a plurality of bypass circuits each of which is coupled between a respective pair of the routing segments, wherein the bypass circuits are operable to switch the spare row into use when one of the rows of circuitry contains a defective circuit, wherein each routing segment is operable to be driven by an associated routing segment using a respective one of the bypass circuits, wherein the plurality of bypass circuits comprises a plurality of multiplexers, and wherein each multiplexer in the plurality of multiplexers includes a first input operable to receive user signals, a second input that is coupled to one associated routing segment, and an output that is coupled to another associated routing segment.
地址 San Jose CA US