Data processing circuit with an elementary processor, data processing assembly including an array of such circuits, and matrix sensor including such an assembly

摘要

A data processing circuit includes a data processing unit including two signal-conversion circuits and controlled switches connected to inputs and outputs of the conversion circuits. The data processing unit further includes a binary signal inlet, a binary signal outlet, and a memory unit. The memory unit includes capacitors each storing a binary piece of data. The capacitors are connected to a memory bus via switches. The bus is connected to the processing unit. In response to control signals provided to the controlled switches, the data processing unit performs at least the following operations: writing a binary datum in a capacitor, reading from a capacitor a binary datum stored therein and applying the datum to an output, and logically combining binary data stored in at least two capacitors.

主权项

1. A data processing circuit, comprising:
a data processing unit comprising first and second signal conversion circuits, each having a signal input and a signal output, and a plurality of controlled switches connected to the inputs and outputs of the conversion circuits, wherein the data processing unit further comprises a binary signal input and a binary signal output, a memory unit comprising a plurality of capacitors connected to a memory bus arrangement via a plurality of switches, each capacitor storing a binary datum, wherein the bus is connected to the processing unit, a plurality of inputs for control signals of the controlled switches, wherein the data processing unit is capable of carrying out at least the following operations in response to control signal data sequences:
writing in a capacitor a binary datum applied to an input line,reading in a capacitor a binary datum that is stored therein, and applying the read binary datum to an output line, andlogically combining binary data stored in at least two capacitors.