发明名称 Systems and methods for determining adjustable wafer acceptance criteria based on chip characteristics
摘要 Systems and methods for determining adjustable wafer acceptance criteria based on chip characteristics. The method includes measuring a density of at least one chip. The method further includes computing a difference in density between the density of the at least one chip and a density of at least one kerf structure. The method further includes calculating an offset value to modify a Wafer Acceptance Criteria (WAC) to match the density difference between the at least one chip and the at least one kerf structure. The method further includes applying the offset value to the WAC for a wafer level measurement in order to increase chip yield performance.
申请公布号 US8862417(B2) 申请公布日期 2014.10.14
申请号 US201113151337 申请日期 2011.06.02
申请人 International Business Machines Corporation 发明人 Chu Albert M.;Johnson Eric D.;Rensch William J.;Viswanath Manikandan
分类号 G01N37/00;G06F17/50;H01L21/66 主分类号 G01N37/00
代理机构 Roberts Mlotkowski Safran & Cole, P.C. 代理人 Cain David;Roberts Mlotkowski Safran & Cole, P.C.
主权项 1. A method comprising: measuring a density of at least one chip; computing a difference in density between the density of the at least one chip and a density of at least one kerf structure; quantifying a process or performance offset for the at least one chip based on the computed difference in the density; quantifying a kerf ring oscillator offset based on the process or performance offset; calculating a kerf ring oscillator delay target to be used for the at least one chip based on the kerf ring oscillator offset; adjusting a delay of the at least one kerf structure to match the kerf ring oscillator delay target such that the at least one kerf structure is adjusted to match the process or performance offset quantified for the at least one chip; and adjusting parameters of the at least one kerf structure predefined by Wafer Acceptance Criteria (WAC) to match the density difference between the at least one chip and the at least one kerf structure such that performance of the at least one kerf structure with the adjusted delay tracks with performance of the at least one chip wherein at least the step of calculating the kerf ring oscillator delay target is performed using a processor.
地址 Armonk NY US