Non-disruptive selective traffic blocking in a SAS domain

摘要

The invention may be embodied in a SAS expander with register bits within Phys associated with I/O devices. Setting and unsetting the register bit in the Phy associated with a particular physical or logical device allows I/O traffic to be blocked and unblocked, as desired, to the selected physical or logical devices. In a particular embodiment, when the register bit is set to a blocking state, an OPEN request that comes in on the SAS link is rejected using OPEN_REJECT (RETRY). Phy register bits may be provided for multiple different SAS protocols that can be controlled individually for each attached SAS device. The Phy register bit may also be used to reject only SAS connection requests that attempt to leave a particular SAS link.

主权项

1. A serial attached small computer system interface (SAS) input/output (I/O) control system comprising:
one or more SAS agents; a plurality of physical or logical devices; one or more SAS expanders connecting the physical devices to the one or more SAS agents and mediating I/O communications between the plurality of physical or logical devices and the one or more SAS agent; each SAS expander including a plurality of Phys, wherein each Phy is associated with a particular physical device; each SAS expander comprising a plurality of configurable I/O control register bits, wherein each configurable I/O control register bit is associated with a particular physical or logical device of the plurality of physical or logical devices, wherein each configurable I/O control register bit is controllable by one or more particular SAS agents of the one or more SAS agents; wherein each SAS expander is further configured to enable SAS OPEN requests for the particular logical or physical device when the associated configurable I/O control register bit is set to a first value, and each SAS expander is further configured to disable SAS OPEN requests that are configured to leave a SAS link when the associated configurable I/O control register bit is set to a second value; wherein each SAS expander is further configured to operate the plurality of configurable I/O control register bits; and wherein each Phy is configured to return an OPEN REJECT (RETRY) response to a disabled OPEN request to delay and not cancel the disabled OPEN request when the associated particular configurable I/O control register bit is set to the second value.