| 摘要 |
A multi-port memory may be formed from a plurality of “simpler” memories. In one implementation, the memory includes a write port and a number of memories provided in groups, such that the write port supplies each of a plurality of copies of the data unit to a subset of the memories, each of the subset of memories being provided in a corresponding one of the groups, a number of the copies of the data unit being greater than two. Multiplexers may be implemented, each of which being associated with a corresponding one of the groups of the memories. One of the plurality of multiplexers may be configured to selectively supply one of the copies of the data unit from one of the memories. A read port may receive the one of the copies of the data unit from the one of the multiplexers and output the one of the copies of the data unit. |
| 主权项 |
1. A switch, comprising:
a first rotator circuit having a plurality of inputs and a plurality of outputs, the rotator circuit rotates a signal present on one of the plurality inputs among each of a plurality of outputs in accordance with a first rotation count; a first register coupled to one of the plurality of outputs of the first rotator circuit; an ingress port configured to supply a data unit from the first register; a write port coupled to the ingress port, the write port configured to receive the data unit; a plurality of memories provided in groups, the write port supplies each of a plurality of copies of the data unit, such that said each of the plurality of copies of the data unit is written to a subset of the plurality of memories, each of the subsets of the plurality of memories being provided in a corresponding one of the plurality of groups; a plurality of multiplexers, each of which being associated with a corresponding one of the groups of the memories, one of the plurality of multiplexers being configured to selectively supply one of the plurality of copies of the data unit from one of the plurality of memories; a read port configured to receive said one of the plurality of copies of the data unit from said one of the plurality of multiplexers; an egress port coupled to the read port and configured to output said one of the plurality of copies of the data unit; a second register that receives one of the plurality of copies of the data unit from the egress port; and a second rotator circuit having an input coupled to the second register and a plurality of outputs, the second rotator circuit outputting said one of the plurality of copies of the data unit on a selected one of the plurality of outputs of the second rotator circuit in accordance with a second rotation count, the first rotator circuit including first multiplexers and the second rotator including second multiplexers, the plurality of multiplexers not including the first multiplexers and second multiplexers. |
