| 发明名称 | Resistive memory device and fabrication method thereof | ||
| 摘要 | A resistive memory device capable of implementing a multi-level cell (MLC) and a fabrication method thereof are provided. The resistive memory device includes a lower electrode connected to a switching device and including a first node and a second node formed on a top thereof to be spaced at a fixed interval, a phase-change material pattern formed on the first node and the second node, an upper electrode formed on the phase-change material pattern, a conductive material layer formed on a top and outer sidewall of the upper electrode, a first contact plug formed on one edge of the upper electrode to be connected to the upper electrode and the conductive material layer, and a second contact plug formed on the other edge of the upper electrode to be connected to the upper electrode and the conductive material layer. | ||
| 申请公布号 | US8860003(B2) | 申请公布日期 | 2014.10.14 |
| 申请号 | US201313791561 | 申请日期 | 2013.03.08 |
| 申请人 | SK hynix Inc. | 发明人 | Oh Jae Min |
| 分类号 | H01L47/00;H01L45/00;H01L27/24 | 主分类号 | H01L47/00 |
| 代理机构 | Kilpatrick Townsend & Stockton LLP | 代理人 | Kilpatrick Townsend & Stockton LLP |
| 主权项 | 1. A resistive memory device, comprising: a lower electrode connected to a switching device and including a first node and a second node formed on a top thereof to be spaced at a fixed interval; a phase-change material pattern formed on the first node and the second node; an upper electrode formed on the phase-change material pattern; a conductive material layer formed on a top and outer sidewall of the upper electrode; a first contact plug formed on one edge of the top of the upper electrode to be connected to the upper electrode and the conductive material layer; and a second contact plug formed on the other edge of the top of the upper electrode to be connected to the upper electrode and the conductive material layer. | ||
| 地址 | Icheon-si KR | ||