Phase locked loop for harmonic cancelling

摘要

The present invention relates to a phase locked loop for suppressing harmonics. According to the present invention, a phase locked loop includes: a voltage-controlled oscillator which generates a N-times frequency signal corresponding to the N (N is an integer) times of an oscillation frequency signal as a differential signal, and outputs the N-times frequency signal; a frequency divider which divides the N-times frequency signal outputted as the differential signal by N and outputs the oscillation frequency signal; and a signal selector which selects two oscillation signal pairs having phase different from the differential signal among the four oscillation frequency signals. The N-times frequency signal outputted from the voltage-controlled oscillator provides a phase locked loop to suppress harmonics which are used to suppress N-th harmonic included in the oscillation frequency signal pair outputted from the signal selector. According to the phase locked loop to suppress the harmonics, the N-th harmonic signal near the oscillation frequency can be suppressed using the N-times frequency signal outputted from the voltage-controlled oscillator, and the suppression can be obtained without forming an additional feedback loop.